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MEMDTI: Memory data transfer & Interface

This is the most important series of experiments that will allow the user to access the FPGA board in its entirety. For the completion of the theory its necessary to understand how the entire system works and here it is briefed down. The FPGA which every user accesses is in the ADMXRC-II board provided by AlphaData. This plug-in-card goes into the PCI slot of the server computer, similar to the graphics card. Look into Fig 1.


Fig.1 Block diagram of ADM XRC II Board

(Source: http://www.alphadata.co.uk/products.php?product=adm-xrc-ii# )


In the previous experiments the user uploads one or two files and trigger the execution and viewed the results. Once the user trigger the experiment, the corresponding C-executable is invoked which in turn communicates the user data to ADMXRC-II board through PCI bus. For this, specific handles are given in the C-program so as to write to bus, read from bus, amount of data etc. The finer details are available in Fig 1. The signals on PCI bus is input to PCI I/O accelarator PCI 9656 (PCI Bridge) which will interface it to 32 bit local bus. Look into Fig 2. The local bus interface synthesized in FPGA will look into these local bus signals and take care of them.


Fig.2 Memory interfacing flow


However every user have their own applications to port to FPGA which may vary according to user. The board has additional 6 banks of 1 MB RAM since the FPGA space is inadequate for all applications. The details of how it is accessed is shown in the Fig 3.Lets refrain ourselves from going deeper into each of the modules, which is not necessary for the experiment. However for the completion of theory the basics of each block is given below.


Fig.3 Memory interfacing in detail


clocks : Clock generator module using the Virtex II DCMs
local bus interface : Respects the local bus signals and interface the data to one of the 6 banks available.
user module : User defined application which reads the data from memory banks and processes it thereafter stores it back to memory.
zbt_access_controller : gives access of the memory to the local bus or user module
zbt_port_driver : Sends the address and data to the memory or ensure the lines to be in high impedance state.
zbt_io_buffer : To drive high current through data lines 

Cite this Simulator:

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