Sinusoidal Pulse Width Modulation (SPWM)
Apply multiple gate signals to the IGBTs T1, T2 in positive half-cycle and T3, T4 in negative half-cycle. The gate signals for T1, T2 are generated by comparing the high frequency (fcar) triangular carrier signal vcar1 with sine control signal vc1 of frequency fo. Similarly, the gate signals for T3, T4 are generated by comparing the vcar2 (=vcar1) with sine control signal vc2 = -vc1 of frequency fo. The peak magnitude of control sine signal controls the modulation index ma which in turn controls the rms output voltage.
Observe the waveforms across each element of the power circuit with R and RL loads.
The output voltage and current can be observed for different values of Ro, Lo, Vdc, Vc1, Vc2, ma, mf or fo.
Main Circuit Diagram
Circuit Diagram With Voltmeters And Ammeters At Various Points
For R Load
R = 10 Ω
For RL Load.
R = 1 Ω, L = 10 mH